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CONPAR
1994
15 years 10 months ago
The Rewrite Rule Machine Node Architecture and Its Performance
The Rewrite Rule Machine (RRM) is a massively parallel MIMD/SIMD computer designed with the explicit purpose of supporting veryhigh-level parallel programming with rewrite rules. T...
Patrick Lincoln, José Meseguer, Livio Ricci...
HOTOS
2007
IEEE
15 years 10 months ago
Microdrivers: A New Architecture for Device Drivers
Commodity operating systems achieve good performance by running device drivers in-kernel. Unfortunately, this architecture offers poor fault isolation. This paper introduces micro...
Vinod Ganapathy, Arini Balakrishnan, Michael M. Sw...
DATE
2004
IEEE
168views Hardware» more  DATE 2004»
15 years 10 months ago
Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia Processing
Energy efficient embedded systems consist of a heterogeneous collection of very specific building blocks, connected together by a complex network of many dedicated busses and inte...
Ingrid Verbauwhede, Patrick Schaumont, Christian P...
FPL
2008
Springer
112views Hardware» more  FPL 2008»
15 years 8 months ago
Secure FPGA configuration architecture preventing system downgrade
In the context of FPGAs, system downgrade consists in preventing the update of the hardware configuration or in replaying an old bitstream. The objective can be to preclude a syst...
Benoît Badrignans, Reouven Elbaz, Lionel Tor...
CDES
2008
166views Hardware» more  CDES 2008»
15 years 8 months ago
Scalable Directory Organization for Tiled CMP Architectures
Although directory-based cache coherence protocols are the best choice when designing chip multiprocessor architectures (CMPs) with tens of processor cores on chip, the memory ove...
Alberto Ros, Manuel E. Acacio, José M. Garc...