Clock gating is a power reduction technique that has been used successfully in the custom ASIC domain. Clock and logic signal power are saved by temporarily disabling the clock si...
This paper presents an algorithm for the automatic mapping of problem specifications to existing architecture templates. The proposed methodology supports the combination of exist...
Nikos S. Voros, Evaggelinos P. Mariatos, Michael K...
State-of-the-art and emerging scientific applications require fast access to large quantities of data and commensurately fast computational resources. Both resources and data are ...
Ian T. Foster, Carl Kesselman, Gene Tsudik, Steven...
This paper presents a development methodology for complex robotic systems using the behavior-based control architecture iB2C (integrated Behavior-Based Control). It is shown how a...
Network positioning has recently been demonstrated to be a viable concept to represent the network distance relationships among Internet end hosts. Several subsequent studies have...