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    ASAP
    2002
    IEEE
    70views Hardware» more  ASAP 2002»
    Refining Instruction Set Architecture for High-Performance Multimedia Processing in Constrained Environments
    15 years 11 months ago
    Refining Instruction Set Architecture for High-Performance Multimedia Processing in Constrained Environments
    Download  palms.ee.princeton.edu
    Ruby B. Lee, A. Murat Fiskiran, Zhijie Shi, Xiao Y...
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    SAMOS
    2009
    Springer
    107views Embedded Systems» more  SAMOS 2009»
    Programmable and Scalable Architecture for Graphics Processing Units
    15 years 10 months ago
    Programmable and Scalable Architecture for Graphics Processing Units
    Download  samos.et.tudelft.nl
    Carlos S. de La Lama, Pekka Jääskelä...
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    CAISE
    2001
    Springer
    91views Information Technology» more  CAISE 2001»
    Process Reuse Architecture
    15 years 10 months ago
    Process Reuse Architecture
    Download  www-di.inf.puc-rio.br
    Soeli T. Fiorini, Julio Cesar Sampaio do Prado Lei...
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    ICCD
    2000
    IEEE
    159views Hardware» more  ICCD 2000»
    Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures
    15 years 10 months ago
    Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures
    Download  lca.ece.utexas.edu
    This paper aims to provide a quantitative understanding of the performance of DSP and multimedia applications on very long instruction word (VLIW), single instruction multiple dat...
    Deependra Talla, Lizy Kurian John, Viktor S. Lapin...
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    ISPW
    1993
    IEEE
    85views Software Engineering» more  ISPW 1993»
    Humans in the Process: Architectural Implications
    15 years 10 months ago
    Humans in the Process: Architectural Implications
    Download  users.ece.utexas.edu
    Dewayne E. Perry
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