This paper describes the architecture, operation and results obtained with the Question Answering prototype developed in the Department of Language Processing and Information Syst...
This paper presents the design of an ASIC intended for optimal edge detection of blurred and noisy 2-D images. The chip has a parallel and pipelined architecture which processes a...
Transmission of high quality video over the Internet faces many challanges including unpredictable packet loss characteristics of the current Internet and the heterogeneity of rec...
This paper presents two schemes for the implementation of high performance and low power FIR filtering Intellectual Property (IP) cores. Low power is achieved through the utilizat...
This paper proposes an equation-based multi-scenario iterative robust optimization methodology for analog/mixed-signal circuits. We show that due to local circuit performance mono...