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ISPD
1999
ACM
89views Hardware» more  ISPD 1999»
15 years 10 months ago
VIA design rule consideration in multi-layer maze routing algorithms
—Maze routing algorithms are widely used for finding an optimal path in detailed routing for very large scale integration, printed circuit board and multichip modules In this pap...
Jason Cong, Jie Fang, Kei-Yong Khoo
DATE
2009
IEEE
115views Hardware» more  DATE 2009»
15 years 10 months ago
Customizing IP cores for system-on-chip designs using extensive external don't-cares
Traditional digital circuit synthesis flows start from an HDL behavioral definition and assume that circuit functions are almost completely defined, making don't-care conditio...
Kai-Hui Chang, Valeria Bertacco, Igor L. Markov
JUCS
2008
161views more  JUCS 2008»
15 years 6 months ago
A Model-Driven Approach to Align Business Processes with User Interfaces
: Information Technology (IT) has evolved over time from its traditional use as administrative support towards a more strategic role to enforce business processes (BP). But several...
Kênia Soares Sousa, Hildeberto Mendonç...
ASPLOS
1998
ACM
15 years 10 months ago
Performance of Database Workloads on Shared-Memory Systems with Out-of-Order Processors
Database applications such as online transaction processing (OLTP) and decision support systems (DSS) constitute the largest and fastest-growing segment of the market for multipro...
Parthasarathy Ranganathan, Kourosh Gharachorloo, S...
DCOSS
2006
Springer
15 years 10 months ago
Efficient In-Network Processing Through Local Ad-Hoc Information Coalescence
We consider in-network processing via local message passing. The considered setting involves a set of sensors each of which can communicate with a subset of other sensors. There is...
Onur Savas, Murat Alanyali, Venkatesh Saligrama