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ICPP
2002
IEEE
15 years 11 months ago
Optimal Code Size Reduction for Software-Pipelined Loops on DSP Applications
Code size expansion of software-pipelined loops is a critical problem for DSP systems with strict code size constraint. Some ad-hoc code size reduction techniques were used to try...
Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha
167
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ICISP
2010
Springer
15 years 11 months ago
Determining Dominant Frequency with Data-Adaptive Windows
Abstract. Measurement of activation rates in cardiac electrograms is commonly done though estimating the frequency of the sinusoid with the greatest power. This frequency, commonly...
Gagan Mirchandani, Shruti Sharma
CSCWD
2001
Springer
15 years 11 months ago
Modeling Workflow within Distributed Systems
Workflow management techniques are aiming at supporting business process across organization boundaries. Current techniques are lacking of the formalism tools to model and analyze...
Yuhong Yan, Alex Bejan
GLVLSI
2000
IEEE
85views VLSI» more  GLVLSI 2000»
15 years 11 months ago
Fast and accurate estimation of floorplans in logic/high-level synthesis
In many applications such as high-level synthesis (HLS) and logic synthesis and possibly engineering change order (ECO) we would like to get fast and accurate estimations of diffe...
Kia Bazargan, Abhishek Ranjan, Majid Sarrafzadeh
DAC
1999
ACM
15 years 11 months ago
Behavioral Synthesis of Analog Systems Using Two-layered Design Space Exploration
This paper presents a novel approach for synthesis of analog systems from behavioral VHDL-AMS specifications. We implemented this approach in the VASE behavioral-synthesis tool. ...
Alex Doboli, Adrián Núñez-Ald...