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DATE
2006
IEEE
171views Hardware» more  DATE 2006»
16 years 25 days ago
Dynamic bit-width adaptation in DCT: image quality versus computation energy trade-off
We present a dynamic bit-width adaptation scheme in DCT applications for efficient trade-off between image quality and computation energy. Based on sensitivity differences of 64 ...
Jongsun Park, Jung Hwan Choi, Kaushik Roy
ECBS
1996
IEEE
155views Hardware» more  ECBS 1996»
15 years 11 months ago
Model-Integrated Program Synthesis Environment
In this paper, it is shown that, through the use of Model-Integrated Program Synthesis MIPS, parallel real-time implementations of image processing data ows can be synthesized fro...
Janos Sztipanovits, Gabor Karsai, Hubertus Franke
ISCAS
2008
IEEE
121views Hardware» more  ISCAS 2008»
16 years 1 months ago
A novel flash analog-to-digital converter
—In this paper a new ADC architecture of flash type is proposed. This proposed N-bit flash ADC replaces the (2N -1)-toN encoder with two (2N/2 -1)-to-(N/2) encoders to accomplish...
Chia-Nan Yeh, Yen-Tai Lai
ICMCS
1999
IEEE
89views Multimedia» more  ICMCS 1999»
15 years 11 months ago
A Lightweight Protocol for Interconnecting Heterogeneous Devices in Dynamic Environments
In the near future people will be able to move freely and still have seamless network and Internet connectivity. One implication of this new style of interaction is an increased d...
Kevin C. Almeroth, Katia Obraczka, Dante DeLucia
FPGA
2000
ACM
128views FPGA» more  FPGA 2000»
15 years 10 months ago
Factoring large numbers with programmable hardware
The fastest known algorithms for factoring large numbers share a core sieving technique. The sieving cores find numbers that are completely factored over a prime base set raised t...
Hea Joung Kim, William H. Mangione-Smith