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ISORC
1999
IEEE
15 years 11 months ago
Applying Use Cases for the Requirements Validation of Component-Based Real-Time Software
Component-based software development is a promising way to improve quality, time to market and handle the increasing complexity of software for real-time systems. In this paper th...
Wolfgang Fleisch
ISSS
1999
IEEE
149views Hardware» more  ISSS 1999»
15 years 11 months ago
A Buffer Merging Technique for Reducing Memory Requirements of Synchronous Dataflow Specifications
Synchronous Dataflow, a subset of dataflow, has proven to be a good match for specifying DSP programs. Because of the limited amount of memory in embedded DSPs, a key problem duri...
Praveen K. Murthy, Shuvra S. Bhattacharyya
FCT
1999
Springer
15 years 11 months ago
Iterative Arrays with a Wee Bit Alternation
Abstract. An iterative array is a line of interconnected interacting finite automata. One distinguished automaton, the communication cell, is connected to the outside world and fe...
Thomas Buchholz, Andreas Klein, Martin Kutrib
ISLPED
1998
ACM
78views Hardware» more  ISLPED 1998»
15 years 11 months ago
Power-delay tradeoffs for radix-4 and radix-8 dividers
The use of higher radices in division reduces the number of iterations to complete the operation, but increases the complexity of the circuit. In this paper we explore the in uenc...
Alberto Nannarelli, Tomás Lang
ISLPED
1998
ACM
86views Hardware» more  ISLPED 1998»
15 years 11 months ago
The energy complexity of register files
Register files (RF) represent a substantial portion of the energy budget in modern processors, and are growing rapidly with the trend towards wider instruction issue. The actual ...
Victor V. Zyuban, Peter M. Kogge