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FPL
2005
Springer
73views Hardware» more  FPL 2005»
16 years 4 days ago
Energy-Efficient NoC for Best-Effort Communication
A Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture for Multi-Processor System-onChip (MPSoC) architectures. In an earlier paper we proposed a energ...
Pascal T. Wolkotte, Gerard J. M. Smit, Jens E. Bec...
MICRO
1999
IEEE
108views Hardware» more  MICRO 1999»
15 years 11 months ago
Exploiting ILP in Page-based Intelligent Memory
This study compares the speed, area, and power of di erent implementations of Active Pages OCS98], an intelligent memory system which helps bridge the growing gap between processo...
Mark Oskin, Justin Hensley, Diana Keen, Frederic T...
GLOBECOM
2007
IEEE
15 years 10 months ago
Distributed Energy-Efficient Cooperative Routing in Wireless Networks
Recently, cooperative routing in wireless networks has gained much interest due to its ability to exploit the broadcast nature of the wireless medium in designing powerefficient ro...
Ahmed S. Ibrahim, Zhu Han, K. J. Ray Liu
ASPDAC
2008
ACM
108views Hardware» more  ASPDAC 2008»
15 years 8 months ago
Synthesis and design of parameter extractors for low-power pre-computation-based content-addressable memory using gate-block sel
Content addressable memory (CAM) is frequently used in applications, such as lookup tables, databases, associative computing, and networking, that require high-speed searches due t...
Jui-Yuan Hsieh, Shanq-Jang Ruan
ASPDAC
2008
ACM
151views Hardware» more  ASPDAC 2008»
15 years 8 months ago
High performance current-mode differential logic
This paper presents a new logic style, named Current-Mode Differential logic (CMDL), that achieves both high operating speed and low power consumption. Inspired by the low-voltage ...
Ling Zhang, Jianhua Liu, Haikun Zhu, Chung-Kuan Ch...