5086 search results - page 276 / 1018 » The Power of Comparative Reasoning |
150
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ASYNC
2005
IEEE
16 years 6 days ago
2005
IEEE
We present an apparatus used to distribute a timing reference or clock across the extent of a digital system. Selftimed circuitry both generates and distributes a clock signal, wh...
125
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ISCAS
2005
IEEE
16 years 5 days ago
2005
IEEE
In this paper, a framework of designing a low-error and power-efficient two’s-complement fixed-width Booth multiplier that receives two n-bit numbers and produces an n-bit produ...
162
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SBCCI
2003
ACM
15 years 12 months ago
2003
ACM
– We present a new architecture for signed multiplication which maintains the pure form of an array multiplier, exhibiting a much lower overhead than the Booth architecture. This...
129
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ASPDAC
1998
ACM
15 years 10 months ago
1998
ACM
-- The logic construction of a double-edge-triggered (DET) flip-flop, which can receive input signal at two levels of the clock, is analyzed and a new circuit design of CMOS DET fl...
165
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ICASSP
2010
IEEE
15 years 6 months ago
2010
IEEE
Most speech enhancement algorithms heavily depend on the noise power spectral density (PSD). Because this quantity is unknown in practice, estimation from the noisy data is necess...