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ISCAS
2005
IEEE
95views Hardware» more  ISCAS 2005»
16 years 23 hour ago
Area, power, and pin efficient bus transceiver using multi-bit-differential signaling
—This paper describes a new low-power, area and pin efficient alternative to differential encoding for high performance chip-to-chip and backplane signaling. The technique, calle...
Donald M. Chiarulli, Jason D. Bakos, Joel R. Marti...
CASES
2004
ACM
15 years 12 months ago
A low power architecture for embedded perception
Recognizing speech, gestures, and visual features are important interface capabilities for future embedded mobile systems. Unfortunately, the real-time performance requirements of...
Binu K. Mathew, Al Davis, Michael Parker
COLT
2004
Springer
15 years 12 months ago
Replacing Limit Learners with Equally Powerful One-Shot Query Learners
Different formal learning models address different aspects of human learning. Below we compare Gold-style learning—interpreting learning as a limiting process in which the lear...
Steffen Lange, Sandra Zilles
LATIN
2010
Springer
15 years 11 months ago
The Power of Fair Pricing Mechanisms
We explore the revenue capabilities of truthful, monotone (“fair”) allocation and pricing functions for resource-constrained auction mechanisms within a general framework that ...
Christine Chung, Katrina Ligett, Kirk Pruhs, Aaron...
ARITH
1999
IEEE
15 years 10 months ago
Low-Power Division: Comparison among Implementations of Radix 4, 8 and 16
Although division is less frequent than addition and multiplication, because of its longer latency it dissipates a substantial part of the energy in floating-point units. In this ...
Alberto Nannarelli, Tomás Lang