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ATS
2004
IEEE
87views Hardware» more  ATS 2004»
15 years 10 months ago
Low Power BIST with Smoother and Scan-Chain Reorder
In this paper, we propose a low-power testing methodology for the scan-based BIST. A smoother is included in the test pattern generator (TPG) to reduce average power consumption d...
Nan-Cheng Lai, Sying-Jyan Wang, Yu-Hsuan Fu
NIPS
2004
15 years 7 months ago
Methods for Estimating the Computational Power and Generalization Capability of Neural Microcircuits
What makes a neural microcircuit computationally powerful? Or more precisely, which measurable quantities could explain why one microcircuit C is better suited for a particular fa...
Wolfgang Maass, Robert A. Legenstein, Nils Bertsch...
CORR
2010
Springer
156views Education» more  CORR 2010»
15 years 6 months ago
Topological analysis of the power grid and mitigation strategies against cascading failures
This paper presents a complex systems overview of a power grid network under cascading conditions. The cascading effect has been simulated on three different networks, the IEEE 300...
Sakshi Pahwa, Amelia Hodges, Caterina M. Scoglio, ...
ADHOC
2005
116views more  ADHOC 2005»
15 years 6 months ago
Power efficient routing trees for ad hoc wireless networks using directional antenna
In ad hoc wireless networks, nodes are typically powered by batteries. Therefore saving energy has become a very important objective, and different algorithms have been proposed t...
Fei Dai, Qing Dai, Jie Wu
TSP
2008
83views more  TSP 2008»
15 years 6 months ago
Bit and Power Allocation for Goodput Optimization in Coded Parallel Subchannels With ARQ
Abstract--This paper addresses the problem of adaptively allocating the bits and the power among a set of parallel subchannels. A frame-oriented transmission with convolutional cod...
B. Devillers, Jérôme Louveaux, Luc Va...