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VLSID
2002
IEEE
97views VLSI» more  VLSID 2002»
15 years 11 months ago
Power Supply Noise Aware Floorplanning and Decoupling Capacitance Placement
Power supply noise is a strong function of the switching activities of the circuit modules. Peak power supply noise can be significantly reduced by judiciously arranging the modu...
Shiyou Zhao, Kaushik Roy, Cheng-Kok Koh
DATE
2004
IEEE
116views Hardware» more  DATE 2004»
15 years 10 months ago
Full-Chip Multilevel Routing for Power and Signal Integrity
Conventional physical design flow separates the design of power network and signal network. Such a separated approach results in slow design convergence for wire-limited deep sub-...
Jinjun Xiong, Lei He
NETWORKING
2004
15 years 7 months ago
Power Adaptation Based Optimization for Energy Efficient Reliable Wireless Paths
We define a transmission power adaptation-based routing technique that finds optimal paths for minimum energy reliable data transfer in multi-hop wireless networks. This optimal ch...
Suman Banerjee, Archan Misra
ASPDAC
2010
ACM
165views Hardware» more  ASPDAC 2010»
15 years 4 months ago
Dynamic power estimation for deep submicron circuits with process variation
- Dynamic power consumption in CMOS circuits is usually estimated based on the number of signal transitions. However, when considering glitches, this is not accurate because narrow...
Quang Dinh, Deming Chen, Martin D. F. Wong
HPCA
2005
IEEE
16 years 6 months ago
Software Directed Issue Queue Power Reduction
The issue logic of a superscalar processor dissipates a large amount of static and dynamic power. Furthermore, its power density makes it a hot-spot requiring expensive cooling sy...
Antonio González, Jaume Abella, Michael F. ...