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ASPDAC
2006
ACM
110views Hardware» more  ASPDAC 2006»
16 years 1 months ago
Switching-activity driven gate sizing and Vth assignment for low power design
Power consumption has gained much saliency in circuit design recently. One design problem is modelled as ”Under a timing constraint, to minimize power as much as possible”. Pr...
Yu-Hui Huang, Po-Yuan Chen, TingTing Hwang
ASPDAC
2006
ACM
98views Hardware» more  ASPDAC 2006»
16 years 1 months ago
Timing-driven placement based on monotone cell ordering constraints
− In this paper, we present a new timing-driven placement algorithm, which attempts to minimize zigzags and crisscrosses on the timing-critical paths of a circuit. We observed th...
Chanseok Hwang, Massoud Pedram
DOCENG
2006
ACM
16 years 1 months ago
Minimum sized text containment shapes
In many text-processing applications, we would like shapes that expand (or shrink) in size to fit their textual content. We address how to efficiently compute the minimum size fo...
Nathan Hurst, Kim Marriott, Peter Moulder
IWCMC
2006
ACM
16 years 1 months ago
Budgeting power: packet duplication and bit error rate reduction in wireless ad-hoc networks
In this paper we present and evaluate a new technique to lower packet-level error rates of application layer connections in wireless ad-hoc networks. In our scheme, data packets s...
Ghassen Ben Brahim, Bilal Khan
MOBIWAC
2006
ACM
16 years 1 months ago
Indoor tracking in WLAN location with TOA measurements
Authors presented recently an indoor location technique based on Time Of Arrival (TOA) obtained from Round-Trip-Time (RTT) measurements at data link level and trilateration. This ...
Marc Ciurana, Francisco Barceló, Sebastiano...
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