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» The Observational Power of Clocks
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HPCA
2009
IEEE
16 years 7 months ago
Blueshift: Designing processors for timing speculation from the ground up
Several recent processor designs have proposed to enhance performance by increasing the clock frequency to the point where timing faults occur, and by adding error-correcting supp...
Brian Greskamp, Lu Wan, Ulya R. Karpuzcu, Jeffrey ...
IPPS
2009
IEEE
16 years 1 months ago
Dynamic iterations for the solution of ordinary differential equations on multicore processors
In the past few years, there has been a trend of providing increased computing power through greater number of cores on a chip, rather than through higher clock speeds. In order t...
Yanan Yu, Ashok Srinivasan
ISCA
2007
IEEE
113views Hardware» more  ISCA 2007»
16 years 24 days ago
Thermal modeling and management of DRAM memory systems
With increasing speed and power density, high-performance memories, including FB-DIMM (Fully Buffered DIMM) and DDR2 DRAM, now begin to require dynamic thermal management (DTM) a...
Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Howard Da...
ISLPED
2006
ACM
145views Hardware» more  ISLPED 2006»
16 years 14 days ago
An optimal analytical solution for processor speed control with thermal constraints
As semiconductor manufacturing technology scales to smaller device sizes, the power consumption of clocked digital ICs begins to increase. Dynamic voltage and frequency scaling (D...
Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Ch...
PLDI
2003
ACM
15 years 11 months ago
Compile-time dynamic voltage scaling settings: opportunities and limits
With power-related concerns becoming dominant aspects of hardware and software design, significant research effort has been devoted towards system power minimization. Among run-t...
Fen Xie, Margaret Martonosi, Sharad Malik