1542 search results - page 139 / 309 » The Observational Power of Clocks |
184
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ISCA
2006
IEEE
16 years 16 days ago
2006
IEEE
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
172
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ISCAS
2006
IEEE
16 years 15 days ago
2006
IEEE
– Increasing logic densities and clock frequencies on FPGAs lead to rapid increase in power density, which translates to higher on-chip temperature. In this paper, we investigate...
144
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CGO
2005
IEEE
16 years 3 days ago
2005
IEEE
To improve performance and reduce power, processor designers employ advances that shrink feature sizes, lower voltage levels, reduce noise margins, and increase clock rates. Howev...
195
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INFOCOM
2005
IEEE
16 years 2 days ago
2005
IEEE
Packet Classification (PC) has been a critical data path function for many emerging networking applications. An interesting approach is the use of TCAM to achieve deterministic, hi...
171
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CF
2004
ACM
15 years 12 months ago
2004
ACM
Centralized register file architectures scale poorly in terms of clock rate, chip area, and power consumption and are thus not suitable for consumer electronic devices. The conse...