Sciweavers

1542 search results - page 123 / 309
» The Observational Power of Clocks
Sort
View
ISCA
2009
IEEE
214views Hardware» more  ISCA 2009»
16 years 1 months ago
Phastlane: a rapid transit optical routing network
Tens and eventually hundreds of processing cores are projected to be integrated onto future microprocessors, making the global interconnect a key component to achieving scalable c...
Mark J. Cianchetti, Joseph C. Kerekes, David H. Al...
DATE
2008
IEEE
217views Hardware» more  DATE 2008»
16 years 28 days ago
A Coarse-Grained Array based Baseband Processor for 100Mbps+ Software Defined Radio
The Software-Defined Radio (SDR) concept aims to enabling costeffective multi-mode baseband solutions for wireless terminals. However, the growing complexity of new communication ...
Bruno Bougard, Bjorn De Sutter, Sebastien Rabou, D...
ISCAS
2008
IEEE
95views Hardware» more  ISCAS 2008»
16 years 26 days ago
Wireless neural signal acquisition with single low-power integrated circuit
—We present experimental results from an integrated circuit designed for wireless neural recording applications. The chip, which was fabricated in a 0.6-µm 2P3M BiCMOS process, ...
Reid R. Harrison, Ryan J. Kier, Bradley Greger, Fl...
ISCAS
2008
IEEE
123views Hardware» more  ISCAS 2008»
16 years 26 days ago
A 5.2mW all-digital fast-lock self-calibrated multiphase delay-locked loop
—A 333MHz-1GHz all-digital multiphase delay-locked loop with precise multi-phase output has been designed with TSMC 130nm CMOS technology model. A modified binary search algorith...
Li-Pu Chuang, Ming-Hung Chang, Po-Tsang Huang, Chi...
GLOBECOM
2006
IEEE
16 years 16 days ago
Analog Multi-Tone Signaling for High-Speed Backplane Electrical Links
— Implementing a multi-tone (MT) architecture for high-speed backplane electrical links is difficult given the tight power and complexity constraints in this application. This pa...
Amir Amirkhany, Ali-Azam Abbasfar, Vladimir Stojan...