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» The Observational Power of Clocks
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VLSID
2008
IEEE
150views VLSI» more  VLSID 2008»
16 years 6 months ago
PTSMT: A Tool for Cross-Level Power, Performance, and Thermal Exploration of SMT Processors
Simultaneous Multi-Threading (SMT) processors are becoming popular because they exploit both instruction-level and threadlevel parallelism by issuing instructions from different t...
Deepa Kannan, Aseem Gupta, Aviral Shrivastava, Nik...
FPGA
2010
ACM
209views FPGA» more  FPGA 2010»
16 years 3 months ago
FPGA power reduction by guarded evaluation
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
Chirag Ravishankar, Jason Helge Anderson
GLOBECOM
2006
IEEE
16 years 15 days ago
Harnessing the Parity of Multiple Errors in End-to-End MAC Schemes
— We present the results of simulation experiments that compare end-to-end error management (used in controlled access MAC protocols) against hop-by-hop error management (used in...
Ghassen Ben Brahim, Bilal Khan, Ala I. Al-Fuqaha, ...
ASPLOS
2008
ACM
15 years 8 months ago
Exploiting access semantics and program behavior to reduce snoop power in chip multiprocessors
Integrating more processor cores on-die has become the unanimous trend in the microprocessor industry. Most of the current research thrusts using chip multiprocessors (CMPs) as th...
Chinnakrishnan S. Ballapuram, Ahmad Sharif, Hsien-...
JSAC
2007
189views more  JSAC 2007»
15 years 6 months ago
Non-Cooperative Power Control for Wireless Ad Hoc Networks with Repeated Games
— One of the distinctive features in a wireless ad hoc network is lack of any central controller or single point of authority, in which each node/link then makes its own decision...
Chengnian Long, Qian Zhang, Bo Li, Huilong Yang, X...