1542 search results - page 111 / 309 » The Observational Power of Clocks |
153
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DATE
2010
IEEE
15 years 11 months ago
2010
IEEE
—Creating latency insensitive or asynchronous designs from clocked designs has potential benefits of increased modularity and robustness to variations. Several transformations h...
157
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ICRA
2000
IEEE
15 years 11 months ago
2000
IEEE
In this paper, we present the design, modeling and preliminary control of RHex, an autonomous dynamically stable hexapod possessing merely six actuated degrees of freedom (at the ...
159
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GLVLSI
1998
IEEE
15 years 10 months ago
1998
IEEE
Important layout properties of electronic designs include interconnection length values, clock speed, area requirements, and power dissipation. A reliable estimation of those prop...
152
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HPCA
1997
IEEE
15 years 10 months ago
1997
IEEE
In this paper we explore software-managed address translation. The purpose of the study is to specify the memory management design for a high clock-rate PowerPC implementation in ...
148
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ICCD
1997
IEEE
15 years 10 months ago
1997
IEEE
Asynchronous design has a potential of solving many difficulties, such as clock skew and power consumption, which synchronous counterpart suffers with current and future VLSI tech...