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VTS
2003
IEEE
115views Hardware» more  VTS 2003»
16 years 4 days ago
Design and Optimization of Multi-level TAM Architectures for Hierarchical SOCs
Multi-level TAM optimization is necessary for modular testing of hierarchical SOCs that contain older-generation SOCs as embedded cores. We present two hierarchical TAM optimizati...
Vikram Iyengar, Krishnendu Chakrabarty, Mark D. Kr...
DATE
2000
IEEE
113views Hardware» more  DATE 2000»
15 years 11 months ago
Static Timing Analysis of Embedded Software on Advanced Processor Architectures
This paper examines several techniques for static timing analysis. In detail, the first part of the paper analyzes the connection of prediction accuracy (worst case execution tim...
André Hergenhan, Wolfgang Rosenstiel
ENVSOFT
2006
118views more  ENVSOFT 2006»
15 years 6 months ago
Database architectures: Current trends and their relationships to environmental data management
Ever increasing environmental demands from customers, authorities and governmental organizations as well as new business control functions are integrated to environmental manageme...
Jaroslav Pokorný
SIGMETRICS
2000
ACM
147views Hardware» more  SIGMETRICS 2000»
15 years 6 months ago
High-capacity Internet middleware: Internet caching system architectural overview
Previous studies measuring the performance of general-purpose operating systems running large-scale Internet server applications, such as proxy caches, have identified design defi...
Gary Tomlinson, Drew Major, Ron Lee
PUC
2008
116views more  PUC 2008»
15 years 6 months ago
Prototypical implementation of location-aware services based on a middleware architecture for super-distributed RFID tag infrast
of the hardware abstraction layer and of selected core middleware services. The latter enable a mobile device to store and retrieve data and position information in physical places...
Jürgen Bohn