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FCCM
2006
IEEE
113views VLSI» more  FCCM 2006»
16 years 26 days ago
GraphStep: A System Architecture for Sparse-Graph Algorithms
— Many important applications are organized around long-lived, irregular sparse graphs (e.g., data and knowledge bases, CAD optimization, numerical problems, simulations). The gr...
Michael DeLorimier, Nachiket Kapre, Nikil Mehta, D...
201
Voted
CASES
2006
ACM
16 years 23 days ago
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitr...
EGC
2005
Springer
16 years 10 days ago
A Grid Architecture for Comfortable Robot Control
This paper describes a research project about robot control across a computing Grid, first step toward a Grid solution for generic process control. A computational Grid can signi...
Stéphane Vialle, Amelia De Vivo, Fabrice Sa...
CLUSTER
2004
IEEE
15 years 10 months ago
An efficient end-host architecture for cluster communication
Cluster computing environments built from commodity hardware have provided a cost-effective solution for many scientific and high-performance applications. Likewise, middleware te...
Xin Qi, Gabriel Parmer, Richard West
FPGA
2000
ACM
122views FPGA» more  FPGA 2000»
15 years 10 months ago
A reconfigurable multi-function computing cache architecture
A considerable portion of a chip is dedicated to a cache memory in a modern microprocessor chip. However, some applications may not actively need all the cache storage, especially...
Huesung Kim, Arun K. Somani, Akhilesh Tyagi