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HPCA
1999
IEEE
15 years 11 months ago
Impulse: Building a Smarter Memory Controller
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
John B. Carter, Wilson C. Hsieh, Leigh Stoller, Ma...
IPPS
1999
IEEE
15 years 11 months ago
A Parallel Algorithm for Singular Value Decomposition as Applied to Failure Tolerant Manipulators
The system of equations that govern kinematically redundant manipulators is commonly solved by nding the singular value decomposition (SVD) of the corresponding Jacobian matrix. T...
Tracy D. Braun, Anthony A. Maciejewski, Howard Jay...
ISCA
1999
IEEE
94views Hardware» more  ISCA 1999»
15 years 11 months ago
A Performance Comparison of Contemporary DRAM Architectures
In response to the growing gap between memory access time and processor speed, DRAM manufacturers have created several new DRAM architectures. This paper presents a simulation-bas...
Vinodh Cuppu, Bruce L. Jacob, Brian Davis, Trevor ...
COLT
1999
Springer
15 years 11 months ago
Covering Numbers for Support Vector Machines
—Support vector (SV) machines are linear classifiers that use the maximum margin hyperplane in a feature space defined by a kernel function. Until recently, the only bounds on th...
Ying Guo, Peter L. Bartlett, John Shawe-Taylor, Ro...
CONCUR
1999
Springer
15 years 11 months ago
Approximate Symbolic Model Checking of Continuous-Time Markov Chains
d abstract) Christel Baiera, Joost-Pieter Katoenb;c and Holger Hermannsc aLehrstuhl fur Praktische Informatik II, University of Mannheim 68131 Mannheim, Germany bLehrstuhl fur Info...
Christel Baier, Joost-Pieter Katoen, Holger Herman...
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