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173
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
— Technology scaling has caused the feature sizes to shrink continuously, whereas interconnects, unlike transistors, have not followed the same trend. Designing 3D stack architec...
198
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NOCS
2009
IEEE
16 years 1 months ago
2009
IEEE
Design Constraints imposed by global interconnect delays as well as limitations in integration of disparate technologies make 3-D chip stacks an enticing technology solution for m...
193
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IROS
2009
IEEE
16 years 1 months ago
2009
IEEE
— We present an approach to the problem of 3D map building in urban settings for service robots, using threedimensional laser range scans as the main data input. Our system is ba...
177
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FGR
2008
IEEE
16 years 1 months ago
2008
IEEE
: Contactless Human-Machine-Interfaces (HMIs) are an important issue in various applications where a haptic interaction with an input device is not possible or not appropriate. New...
104
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DATE
2007
IEEE
16 years 1 months ago
2007
IEEE
3D integration of multiple active layers into a single chip is a viable technique that greatly reduces the length of global wires by providing vertical connections between layers....