Sciweavers

2529 search results - page 274 / 506
» The Logical Structure of Binding
Sort
View
FPGA
2010
ACM
276views FPGA» more  FPGA 2010»
16 years 3 months ago
Accelerating Monte Carlo based SSTA using FPGA
Monte Carlo based SSTA serves as the golden standard against alternative SSTA algorithms, but it is seldom used in practice due to its high computation time. In this paper, we acc...
Jason Cong, Karthik Gururaj, Wei Jiang, Bin Liu, K...
CSFW
2008
IEEE
16 years 1 months ago
Evidence-Based Audit
Authorization logics provide a principled and flexible approach to specifying access control policies. One of their compelling benefits is that a proof in the logic is evidence ...
Jeffrey A. Vaughan, Limin Jia, Karl Mazurak, Steve...
TOOLS
2008
IEEE
16 years 1 months ago
Guarded Program Transformations Using JTL
There is a growing research interest in employing the logic paradigm for making queries on software in general, and OOP software in particular. We describes a side-effect-free tech...
Tal Cohen, Joseph Gil, Itay Maman
GLVLSI
2007
IEEE
111views VLSI» more  GLVLSI 2007»
16 years 1 months ago
Probabilistic gate-level power estimation using a novel waveform set method
A probabilistic power estimation technique for combinational circuits is presented. A novel set of simple waveforms is the kernel of this technique. The transition density of each...
Saeeid Tahmasbi Oskuii, Per Gunnar Kjeldsberg, Ein...
ICCAD
2007
IEEE
139views Hardware» more  ICCAD 2007»
16 years 29 days ago
Using functional independence conditions to optimize the performance of latency-insensitive systems
—In latency-insensitive design shell modules are used to encapsulate system components (pearls) in order to interface them with the given latency-insensitive protocol and dynamic...
Cheng-Hong Li, Luca P. Carloni