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» The Logic of Correctness in Software Engineering
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ICSE
2008
IEEE-ACM
16 years 7 months ago
A verification system for timed interval calculus
Timed Interval Calculus (TIC) is a highly expressive set-based notation for specifying and reasoning about embedded real-time systems. However, it lacks mechanical proving support...
Chunqing Chen, Jin Song Dong, Jun Sun 0001
SIGSOFT
2007
ACM
16 years 7 months ago
Finding bugs efficiently with a SAT solver
We present an approach for checking code against rich specifications, based on existing work that consists of encoding the program in a relational logic and using a constraint sol...
Julian Dolby, Mandana Vaziri, Frank Tip
FASE
2010
Springer
16 years 1 months ago
A Lightweight and Portable Approach to Making Concurrent Failures Reproducible
Multithreaded concurrent programs often exhibit bugs due to unintended interferences among the concurrent threads. Such bugs are often hard to reproduce because they typically hap...
Qingzhou Luo, Sai Zhang, Jianjun Zhao, Min Hu
ICSM
2007
IEEE
16 years 24 days ago
Indexing Noncrashing Failures: A Dynamic Program Slicing-Based Approach
Recent software systems usually feature an automated failure reporting component, with which a huge number of failures are collected from software end-users. With a proper support...
Xiangyu Zhang Chao Liu, Yu Zhang, Jiawei Han, Bhar...
ICTAC
2009
Springer
15 years 4 months ago
Integration Testing from Structured First-Order Specifications via Deduction Modulo
Testing from first-order specifications has mainly been studied for flat specifications, that are specifications of a single software module. However, the specifications of large s...
Delphine Longuet, Marc Aiguier