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VMCAI
2010
Springer
16 years 3 months ago
Improved Model Checking of Hierarchical Systems
We present a unified game-based approach for branching-time model checking of hierarchical systems. Such systems are exponentially more succinct than standard state-transition gra...
Benjamin Aminof, Orna Kupferman, Aniello Murano
LICS
2009
IEEE
16 years 1 months ago
On the Computational Complexity of Verifying One-Counter Processes
—One-counter processes are pushdown systems over a singleton stack alphabet (plus a stack-bottom symbol). We study the complexity of two closely related verification problems ov...
Stefan Göller, Richard Mayr, Anthony Widjaja ...
GLVLSI
2007
IEEE
187views VLSI» more  GLVLSI 2007»
16 years 1 months ago
DAG based library-free technology mapping
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
Felipe S. Marques, Leomar S. da Rosa Jr., Renato P...
GEOS
2007
Springer
16 years 25 days ago
A Location and Action-Based Model for Route Descriptions
Abstract. Representing human spatial knowledge has long been a challenging research area. The objective of this paper is to model a route description of human navigation where verb...
David Brosset, Christophe Claramunt, Eric Saux
VTS
2006
IEEE
93views Hardware» more  VTS 2006»
16 years 20 days ago
Upper Bounding Fault Coverage by Structural Analysis and Signal Monitoring
A new algorithm for identifying stuck faults in combinational circuits that cannot be detected by a given input sequence is presented. Other than pre and post-processing steps, ce...
Vishwani D. Agrawal, Soumitra Bose, Vijay Gangaram