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ATS
2001
IEEE
126views Hardware» more  ATS 2001»
15 years 10 months ago
Design of an Optimal Test Access Architecture Using a Genetic Algorithm
Test access is a major problem for core-based systemon-chip (SOC) designs. Since cores in an SOC are not directly accessible via chip inputs and outputs, special access mechanisms...
Zahra Sadat Ebadi, André Ivanov
CLUSTER
2001
IEEE
15 years 10 months ago
SOVIA: A User-level Sockets Layer Over Virtual Interface Architecture
The Virtual Interface Architecture (VIA) is an industry standard user-level communication architecture for system area networks. The VIA provides a protected, directlyaccessible i...
Jin-Soo Kim, Kangho Kim, Sung-In Jung
HPCA
1995
IEEE
15 years 10 months ago
Program Balance and Its Impact on High Performance RISC Architectures
Information on the behavior of programs is essential for deciding the number and nature of functional units in high performance architectures. In this paper, we present studies on...
Lizy Kurian John, Vinod Reddy, Paul T. Hulina, Lee...
FASE
2008
Springer
15 years 8 months ago
Verification of Architectural Refactorings by Rule Extraction
With the success of model-driven development as well as component-based and service-oriented systems, models of software architecture are key artefacts in the development process. ...
Dénes Bisztray, Reiko Heckel, Hartmut Ehrig
CSREAESA
2008
15 years 8 months ago
Real-time Embedded Architecture for Advanced Service Robots
In most advanced real-time control applications such as service robots, the tasks have different criticality, flexible timing constraints and variable execution time. For instance...
David Ramada, Carlos Domínguez, Houcine Has...