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GLVLSI
2010
IEEE
164views VLSI» more  GLVLSI 2010»
15 years 11 months ago
Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia D...
COMPSAC
2002
IEEE
15 years 11 months ago
Design and Implementation of a Network Application Architecture for Thin Clients
This paper explores the issues and the techniques of enabling multimedia applications for the thin client computing. A prototype of a video communication system based on H.323 fam...
Chia-Chen Kuo, Ping Ting, Ming-Syan Chen, Jeng-Chu...
LCTRTS
2010
Springer
16 years 1 months ago
Analysis and approximation for bank selection instruction minimization on partitioned memory architecture
A large number of embedded systems include 8-bit microcontrollers for their energy efficiency and low cost. Multi-bank memory architecture is commonly applied in 8-bit microcontr...
Minming Li, Chun Jason Xue, Tiantian Liu, Yingchao...
NSPW
2004
ACM
16 years 4 days ago
Support for multi-level security policies in DRM architectures
Digital rights management systems allow copyrighted content to be commercialized in digital format without the risk of revenue loss due to piracy. Making such systems secure is no...
Bogdan C. Popescu, Bruno Crispo, Andrew S. Tanenba...
EMSOFT
2008
Springer
15 years 8 months ago
A PRAM and NAND flash hybrid architecture for high-performance embedded storage subsystems
NAND flash-based storage is widely used in embedded systems due to its numerous benefits: low cost, high density, small form factor and so on. However, NAND flash-based storage is...
Jin Kyu Kim, Hyung Gyu Lee, Shinho Choi, Kyoung Il...