Sciweavers

12023 search results - page 298 / 2405
» The K-Rep System Architecture
Sort
View
DATE
2003
IEEE
145views Hardware» more  DATE 2003»
15 years 12 months ago
Automated Bus Generation for Multiprocessor SoC Design
The performance of a system, especially a multiprocessor system, heavily depends upon the efficiency of its bus architecture. This paper presents a methodology to generate a custo...
Kyeong Keol Ryu, Vincent John Mooney
SAC
2006
ACM
16 years 20 days ago
A concurrent reactive Esterel processor based on multi-threading
Esterel is a concurrent synchronous language for developing reactive systems. As an alternative to the classical software and hardware synthesis paths, the reactive processing app...
Xin Li, Reinhard von Hanxleden
ECOOPW
1999
Springer
15 years 11 months ago
Dimensions of Component Based Development
As the properties of components have gradually become clearer, attention has started to turn to the architectural issues which govern their interaction and composition. In this pa...
Colin Atkinson, Thomas Kühne, Christian Bunse
USS
2008
15 years 9 months ago
Access Control for Federation of Emulab-based Network Testbeds
This paper describes a resource access control system for federation of Emulab-based testbeds within the DETER federation architecture. The system is based on three levels of prin...
Ted Faber, John Wroclawski
TCSV
2002
107views more  TCSV 2002»
15 years 6 months ago
Design, performance analysis, and implementation of a super-scalar video-on-demand system
Despite the availability of video-on-demand (VoD) services in a number of cities around the world, large-scale deployment of VoD services in a metropolitan area is still economical...
Jack Y. B. Lee, C. H. Lee