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IEEECIT
2005
IEEE
16 years 9 days ago
A Performance and Power Co-optimization Approach for Modern Processors
In embedded systems, performance and power are important inter-related issues that cannot be decoupled. Expensive and extensive simulations in a processor design space are usually...
Yongxin Zhu, Weng-Fai Wong, Cheng-Kok Koh
IEEEPACT
2005
IEEE
16 years 9 days ago
Communication Optimizations for Fine-Grained UPC Applications
Global address space languages like UPC exhibit high performance and portability on a broad class of shared and distributed memory parallel architectures. The most scalable applic...
Wei-Yu Chen, Costin Iancu, Katherine A. Yelick
INFOCOM
2005
IEEE
16 years 9 days ago
A cost-based analysis of overlay routing geometries
— In this paper, we propose a cost-based model to evaluate the resources that each node has to contribute for participating in an overlay network. Such a cost model allows to gau...
Nicolas Christin, John Chuang
IRI
2005
IEEE
16 years 9 days ago
Data integration for capital projects via community-specific conceptual representations
Although data integration has been a research subject for decades in the AEC (Architecture Engineering Construction) industry whose data is usually highly fragmented, nowadays we ...
Yimin Zhu, Mei-Ling Shyu, Shu-Ching Chen
ISCA
2005
IEEE
121views Hardware» more  ISCA 2005»
16 years 9 days ago
Direct Cache Access for High Bandwidth Network I/O
Recent I/O technologies such as PCI-Express and 10Gb Ethernet enable unprecedented levels of I/O bandwidths in mainstream platforms. However, in traditional architectures, memory ...
Ram Huggahalli, Ravi R. Iyer, Scott Tetrick
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