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ACSC
2005
IEEE
16 years 10 days ago
Large Object Segmentation with Region Priority Rendering
The Address Recalculation Pipeline is a hardware architecture designed to reduce the end-to-end latency suffered by immersive Head Mounted Display virtual reality systems. A deman...
Yang-Wai Chow, Ronald Pose, Matthew Regan
APCSAC
2005
IEEE
16 years 10 days ago
Irregular Redistribution Scheduling by Partitioning Messages
Abstract. Dynamic data redistribution enhances data locality and improves algorithm performance for numerous scientific problems on distributed memory multi-computers systems. Prev...
Chang Yu, Ching-Hsien Hsu, Kun-Ming Yu, Chiu-Kuo L...
CCGRID
2005
IEEE
16 years 10 days ago
Semantic integration of file-based data for grid services
Data services for the Grid have focussed so far primarily on virtualising access to distributed databases, and encapsulating file location. However, orchestration of services requ...
Andrew Woolf, Ray Cramer, Marta Gutierrez, Kerstin...
CODES
2005
IEEE
16 years 10 days ago
System-level design automation tools for digital microfluidic biochips
Biochips based on digital microfluidics offer a powerful platform for massively parallel biochemical analysis such as clinical diagnosis and DNA sequencing. Current full-custom de...
Krishnendu Chakrabarty, Fei Su
DSN
2005
IEEE
16 years 10 days ago
Reversible Fault-Tolerant Logic
It is now widely accepted that the CMOS technology implementing irreversible logic will hit a scaling limit beyond 2016, and that the increased power dissipation is a major limiti...
P. Oscar Boykin, Vwani P. Roychowdhury
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