Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Josep...
Programmable logic arrays (PLA), which can implement arbitrary logic functions in a two-level logic form, are promising as platforms for nanoelectronic logic due to their highly r...
Tracing resource usage by Grid users is of utmost importance — especially in the context of large-scale scientific collaborations such as within the High Energy Physics (HEP) c...
Rosario M. Piro, Michele Pace, Antonia Ghiselli, A...
Transaction level models (TLMs) can be constructed at t levels of abstraction, denoted as untimed (UT), cycle-approximate (CX), and cycle accurate (CA) in this paper. The choice o...
Abstract— This paper theoretically analyzes cross-layer optimized design of transmit power allocation in distributed interference-limited wireless networks with asynchronously ac...