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173
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
In this paper we present a generic interconnect fabric for transaction level modelling tackeling three major aspects. First, a review of the bus and IO structures that we have ana...
169
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
Multimedia SoCs are characterized by a main controller that directs the activity of several cores, each of which is in charge of a stage in the processing of a media stream. The v...
194
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
184
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
Design and verification of systems at the Register-Transfer (RT) or behavioral level require the ability to reason at higher levels of abstraction. Difference logic consists of an...
188
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ICSE
2008
IEEE-ACM
16 years 7 months ago
2008
IEEE-ACM
According to Parnas's information hiding principle and Baldwin and Clark's design rule theory, the key step to decomposing a system into modules is to determine the desi...