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SIMUTOOLS
2008
15 years 8 months ago
Simulation of ad hoc networks: ns-2 compared to JiST/SWANS
For the evaluation of ad hoc network protocols, researchers traditionally use simulations because they easily allow for a large number of nodes and reproducible environment condit...
Elmar Schoch, Michael Feiri, Frank Kargl, Michael ...
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
15 years 4 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
TIT
2010
111views Education» more  TIT 2010»
15 years 1 months ago
Designing floating codes for expected performance
Floating codes are codes designed to store multiple values in a Write Asymmetric Memory, with applications to flash memory. In this model, a memory consists of a block of n cells, ...
Flavio Chierichetti, Hilary Finucane, Zhenming Liu...
TVCG
2010
198views more  TVCG 2010»
15 years 1 months ago
Isodiamond Hierarchies: An Efficient Multiresolution Representation for Isosurfaces and Interval Volumes
Efficient multiresolution representations for isosurfaces and interval volumes are becoming increasingly important as the gap between volume data sizes and processing speed continu...
Kenneth Weiss, Leila De Floriani
HPCA
2001
IEEE
16 years 7 months ago
Reevaluating Online Superpage Promotion with Hardware Support
fipical translation lookaside buffers (TLBs)can map a far smaller region of memory than application footprints demand, and the cost of handling TLB misses therefore limits the per...
Zhen Fang, Lixin Zhang, John B. Carter, Wilson C. ...