3872 search results - page 538 / 775 » The Java memory model |
191
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DAC
2006
ACM
15 years 8 months ago
2006
ACM
Software-based self-test (SBST) has recently emerged as an effective methodology for the manufacturing test of processors and other components in systems-on-chip (SoCs). By moving ...
217
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IWOMP
2007
Springer
16 years 25 days ago
2007
Springer
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
158
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ALT
2006
Springer
16 years 3 months ago
2006
Springer
A model for learning in the limit is defined where a (so-called iterative) learner gets all positive examples from the target language, tests every new conjecture with a teacher ...
210
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ISPASS
2009
IEEE
16 years 1 months ago
2009
IEEE
Trace-driven simulation of superscalar processors is particularly complicated. The dynamic nature of superscalar processors combined with the static nature of traces can lead to l...
181
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LCN
2003
IEEE
15 years 12 months ago
2003
IEEE
- With the current wide deployment of Gigabit Ethernet technology in the backbone and workgroup switches, the network performance bottleneck has shifted for the first time in nearl...