2279 search results - page 351 / 456 » The Interaction of Architecture and Operating System Design |
152
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DAC
2001
ACM
16 years 7 months ago
2001
ACM
Crosstalk effects degrade the integrity of signals traveling on long interconnects and must be addressed during manufacturing testing. External testing for crosstalk is expensive ...
156
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VLSID
2006
IEEE
16 years 6 months ago
2006
IEEE
This article describes a standard cell based novel implementation of a low-power Viterbi Decoder (VD) targeted for the IEEE 802.11a Wireless LAN system. Multiple clock rates have ...
138
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ICSE
2005
IEEE-ACM
16 years 6 months ago
2005
IEEE-ACM
It is widely recognized that in order to make performance validation an integrated activity along the software lifecycle it is crucial to be supported from automated approaches. E...
129
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ASYNC
2003
IEEE
15 years 11 months ago
2003
IEEE
We present a high-speed, clockless, serial link transceiver for inter-chip communication in asynchronous VLSI systems. Serial link transceivers achieve high offchip data rates by ...
157
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ISMVL
2010
IEEE
15 years 11 months ago
2010
IEEE
—Fixed-point multiplication architectures are designed and evaluated using a set of logic cells based on a radix-4, quaternary number system. The library of logic circuits is bas...