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CF
2005
ACM
15 years 8 months ago
An efficient wakeup design for energy reduction in high-performance superscalar processors
In modern superscalar processors, the complex instruction scheduler could form the critical path of the pipeline stages and limit the clock cycle time. In addition, complex schedu...
Kuo-Su Hsiao, Chung-Ho Chen
CONEXT
2005
ACM
15 years 8 months ago
MRS: a simple cross-layer heuristic to improve throughput capacity in wireless mesh networks
Wireless Mesh Networks (WMNs) are an emerging architecture based on multi-hop transmission. ISPs considers WMNs as a potential future technology to offer broadband Internet acces...
Luigi Iannone, Serge Fdida
DAC
2005
ACM
15 years 8 months ago
A combined feasibility and performance macromodel for analog circuits
The need to reuse the performance macromodels of an analog circuit topology challenges existing regression based modeling techniques. A model of good reusability should have a num...
Mengmeng Ding, Ranga Vemuri
DAC
2005
ACM
15 years 8 months ago
Differentiate and deliver: leveraging your partners
For the past 25 years, the EDA industry has played a major role in the growth of the semiconductor industry, providing tools and services that have helped companies develop electr...
Jay Vleeschhouwer, Warren East, Michael J. Fister,...
EURONGI
2008
Springer
15 years 8 months ago
Interference-Aware Channel Assignment in Wireless Mesh Networks
DED ABSTRACT The increased popularity and the growth in the number of deployed IEEE 802.11 Access Points (APs) have raised the opportunity to merge together various disjointed wire...
Rosario Giuseppe Garroppo, Stefano Giordano, David...