3922 search results - page 632 / 785 » The IA-64 Architecture at Work |
190
click to vote
CF
2007
ACM
15 years 10 months ago
2007
ACM
As we enter the era of petascale computing, system architects must plan for machines composed of tens or even hundreds of thousands of processors. Although fully connected network...
186
click to vote
CF
2007
ACM
15 years 10 months ago
2007
ACM
This paper presents a novel architectural technique to hide fetch latency overhead of hardware encrypted and authenticated memory. A number of recent secure processor designs have...
198
click to vote
CODES
2007
IEEE
15 years 10 months ago
2007
IEEE
System-level and Platform-based design, along with Transaction Level modeling (TLM) techniques and languages like SystemC, appeared as a response to the ever increasing complexity...
181
click to vote
DAC
2007
ACM
15 years 10 months ago
2007
ACM
RLC circuits have been shown to be better formulated as second-order systems instead of first-order systems. The corresponding model order reduction techniques for secondorder sys...
151
click to vote
DAC
2010
ACM
15 years 10 months ago
2010
ACM
The ever increasing die area of Chip Multiprocessors (CMPs) affects manufacturing yield, resulting in higher manufacture cost. Meanwhile, network-on-chip (NoC) has emerged as a p...