Switching activity estimation is a crucial step in estimating dynamic power consumption in CMOS circuits. In [1], we proposed a new switching probability model based on Bayesian N...
Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...
In floorplan design, it is common that a designer will want to control the positions of some modules in the final packing for various purposes like data path alignment, I/O connec...
Power control is becoming a key challenge for effectively operating a modern data center. In addition to reducing operating costs, precisely controlling power consumption is an es...
Previous proposals for power-aware thread-level parallelism on chip multiprocessors (CMPs) mostly focus on multiprogrammed workloads. Nonetheless, parallel computation of a single...