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207
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ERSA
2010
199views Hardware» more  ERSA 2010»
15 years 4 months ago
Reconfigurable Sparse Matrix-Vector Multiplication on FPGAs
Cache-based, general purpose CPUs perform at a small fraction of their maximum floating point performance when executing memory-intensive simulations, such as those required for sp...
Russell Tessier, Salma Mirza, J. Blair Perot
182
Voted
FPL
2010
Springer
129views Hardware» more  FPL 2010»
15 years 4 months ago
FPGA Implementations of the Round Two SHA-3 Candidates
Abstract--The second round of the NIST-run public competition is underway to find a new hash algorithm(s) for inclusion in the NIST Secure Hash Standard (SHA-3). This paper present...
Brian Baldwin, Andrew Byrne, Liang Lu, Mark Hamilt...
TRIDENTCOM
2010
IEEE
15 years 4 months ago
Interoperability of Lightpath Provisioning Systems in a Multi-domain Testbed
On-demand services are a key feature of Future Internet architectures. Already today research networks around the world provide dedicated optical circuits (lightpaths) to scientist...
Alfred Wan, Paola Grosso, Cees de Laat
227
Voted
ICC
2009
IEEE
125views Communications» more  ICC 2009»
15 years 4 months ago
HMM-Web: A Framework for the Detection of Attacks Against Web Applications
Nowadays, the web-based architecture is the most frequently used for a wide range of internet services, as it allows to easily access and manage information and software on remote ...
Igino Corona, Davide Ariu, Giorgio Giacinto
236
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DEBU
2010
113views more  DEBU 2010»
15 years 4 months ago
Storage Class Memory Aware Data Management
Storage Class Memory (SCM) is here to stay. It has characteristics that place it in a class apart both from main memory and hard disk drives. Software and systems, architectures a...
Bishwaranjan Bhattacharjee, Mustafa Canim, Christi...