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ICCD
2004
IEEE
107views Hardware» more  ICCD 2004»
16 years 3 months ago
Network-on-Chip: The Intelligence is in The Wire
In this paper we describe how Network-on-Chip (NoC) will be the next major challenge to implementing complex and function-rich applications in advanced manufacturing processes at ...
Gérard Mas, Philippe Martin
ARITH
2009
IEEE
16 years 1 months ago
Challenges in Automatic Optimization of Arithmetic Circuits
Despite the impressive progress of logic synthesis in the past decade, finding the best architecture for a given circuit still remains an open and largely unsolved problem, espec...
Ajay K. Verma, Philip Brisk, Paolo Ienne
CISIS
2008
IEEE
16 years 1 months ago
Latency Impact on Spin-Lock Algorithms for Modern Shared Memory Multiprocessors
In 2006, John Mellor-Crummey and Michael Scott received the Dijkstra Prize in Distributed Computing. This prize was for their 1991 paper on algorithms for scalable synchronization ...
Jan Christian Meyer, Anne C. Elster
ISVLSI
2008
IEEE
173views VLSI» more  ISVLSI 2008»
16 years 1 months ago
System Level Design Space Exploration for Multiprocessor System on Chip
Future embedded systems will integrate hundreds of processors. Current design space exploration methods cannot cope with such a complexity. It is mandatory to extend these methods...
Issam Maalej, Guy Gogniat, Jean Luc Philippe, Moha...
SUTC
2008
IEEE
16 years 1 months ago
Service-Oriented Design Methodology for Wireless Sensor Networks: A View through Case Studies
— In this paper we discuss the design methodology based on the service-oriented architecture and agile development principles for wireless embedded and sensor networks (WSNs). Th...
Elena Meshkova, Janne Riihijärvi, Frank Oldew...