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DAC
2011
ACM
14 years 6 months ago
Fault-tolerant 3D clock network
Clock tree synthesis is one of the most important and challenging problems in 3D ICs. The clock signals have to be delivered by through-silicon vias (TSVs) to different tiers with...
Chiao-Ling Lung, Yu-Shih Su, Shih-Hsiu Huang, Yiyu...
CODASPY
2012
14 years 2 months ago
Identifying native applications with high assurance
Main stream operating system kernels lack a strong and reliable mechanism for identifying the running processes and binding them to the corresponding executable applications. In t...
Hussain M. J. Almohri, Danfeng (Daphne) Yao, Denni...
CCE
2004
15 years 6 months ago
Towards integrated information models for data and documents
Numerous approaches to information modeling exist within chemical engineering representing product data, work processes, or other information. These models have a limited scope an...
Birgit Bayer, Wolfgang Marquardt
DAC
2007
ACM
16 years 7 months ago
Progressive Decomposition: A Heuristic to Structure Arithmetic Circuits
Despite the impressive progress of logic synthesis in the past decade, finding the best architecture for a given circuit still remains an open problem and largely unsolved. In mos...
Ajay K. Verma, Philip Brisk, Paolo Ienne
ISPASS
2007
IEEE
16 years 28 days ago
Cross Binary Simulation Points
Architectures are usually compared by running the same workload on each architecture and comparing performance. When a single compiled binary of a program is executed on many diff...
Erez Perelman, Jeremy Lau, Harish Patil, Aamer Jal...