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GLVLSI
2010
IEEE
164views VLSI» more  GLVLSI 2010»
15 years 11 months ago
Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia D...
ECML
1993
Springer
15 years 10 months ago
Integrated Learning Architectures
Research in systems where learning is integrated to other components like problem solving, vision, or natural language is becoming an important topic for Machine Learning. Situatio...
Enric Plaza, Agnar Aamodt, Ashwin Ram, Walter Van ...
FAST
2007
15 years 8 months ago
Architectures for Controller Based CDP
Continuous Data Protection (CDP) is a recent storage technology which enables reverting the state of the storage to previous points in time. We propose four alternative architectu...
Guy Laden, Paula Ta-Shma, Eitan Yaffe, Michael Fac...
ISCA
2008
IEEE
201views Hardware» more  ISCA 2008»
15 years 6 months ago
iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures
Network-on-Chip (NoC) architectures have been adopted by a growing number of multi-core designs as a flexible and scalable solution to the increasing wire delay constraints in the...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
NN
1998
Springer
108views Neural Networks» more  NN 1998»
15 years 6 months ago
How embedded memory in recurrent neural network architectures helps learning long-term temporal dependencies
Learning long-term temporal dependencies with recurrent neural networks can be a difficult problem. It has recently been shown that a class of recurrent neural networks called NA...
Tsungnan Lin, Bill G. Horne, C. Lee Giles