3922 search results - page 134 / 785 » The IA-64 Architecture at Work |
169
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IEEEPACT
2002
IEEE
15 years 11 months ago
2002
IEEE
In this paper, we describe an algorithm and implementation of locality optimizations for architectures with instruction sets such as Intel’s SSE and Motorola’s AltiVec that su...
132
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FPL
2009
Springer
15 years 11 months ago
2009
Springer
Networks-on-Chips (NoCs) are an emerging communication topology paradigm in single chip VLSI design, enhancing parallelism and system scalability. Processing units (PUs) connect t...
158
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HPCC
2009
Springer
15 years 11 months ago
2009
Springer
—The potential for destructive interference between running processes is increased as Chip Multiprocessors (CMPs) share more on-chip resources. We believe that understanding the ...
185
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NEUROSCIENCE
2001
Springer
15 years 11 months ago
2001
Springer
This volume is intended to help advance the field of artificial neural networks along the lines of complexity present in animal brains. In particular, we are interested in examin...
189
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ISSS
1999
IEEE
15 years 10 months ago
1999
IEEE
Decreasing the program size has become an important goal in the design of embedded systems target to mass production. This problem has led to a number of efforts aimed at designin...