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» The High Level Architecture for Simulations
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DAC
1999
ACM
15 years 11 months ago
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...
Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar...
CASES
2009
ACM
16 years 1 months ago
Towards scalable reliability frameworks for error prone CMPs
As technology scales and the energy of computation continually approaches thermal equilibrium [1,2], parameter variations and noise levels will lead to larger error rates at vario...
Joseph Sloan, Rakesh Kumar
ARITH
2001
IEEE
15 years 10 months ago
Computer Arithmetic-A Processor Architect's Perspective
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
Ruby B. Lee
BMCBI
2007
111views more  BMCBI 2007»
15 years 6 months ago
Modular co-evolution of metabolic networks
Background: The architecture of biological networks has been reported to exhibit high level of modularity, and to some extent, topological modules of networks overlap with known f...
Jing Zhao, Guohui Ding, Lin Tao, Hong Yu, Zhong-Ha...
AAI
1998
99views more  AAI 1998»
15 years 6 months ago
Toward Socially Intelligent Service Robots
In the Intelligent Robotics Laboratory (IRL) at Vanderbilt University we seek to develop service robots with a high level of social intelligence and interactivity. In order to ach...
Mitchell Wilkes, W. Anthony Alford, Robert T. Pack...