2424 search results - page 283 / 485 » The High Level Architecture for Simulations |
161
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ICPPW
1999
IEEE
15 years 11 months ago
1999
IEEE
We present a new multiple ring network for multiprocessors, called the Multistage Ring Network(MRN). The MRN has a 2-level hierarchy of register insertion rings, and its interconn...
183
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WETICE
1996
IEEE
15 years 10 months ago
1996
IEEE
This paper describes a security architecture designed to support role-based access control for distributed object systems in a large-scale, multi-organisational enterprise in whic...
190
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HIPEAC
2007
Springer
15 years 10 months ago
2007
Springer
In this paper, we examine the trade-offs in performance and area due to customizing the datapath and instruction set architecture of a soft VLIW processor implemented in a high-den...
151
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ASAP
2004
IEEE
15 years 10 months ago
2004
IEEE
In this paper, we present the design of a carry skip adder that achieves low power dissipation and high-performance operation. The carry skip adder's delay and power dissipat...
236
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DICS
2006
15 years 10 months ago
2006
Virtual laboratories can be characterized by their long-lasting, large-scale computations, where a collection of heterogeneous tools is integrated into data processing pipelines. S...