2424 search results - page 270 / 485 » The High Level Architecture for Simulations |
203
click to vote
GLVLSI
2003
IEEE
15 years 12 months ago
2003
IEEE
In this paper, we address the problem of the efficient exploration of the architectural design space for parameterized systems. Since the design space is multi-objective, our aim ...
189
Voted
IEEEPACT
2003
IEEE
15 years 12 months ago
2003
IEEE
We investigate the implementation of IP look-up for core routers using multiple microengines and a tailored memory hierarchy. The main architectural concerns are limiting the numb...
173
click to vote
ISLPED
2003
ACM
15 years 12 months ago
2003
ACM
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...
177
click to vote
IEEEPACT
2002
IEEE
15 years 11 months ago
2002
IEEE
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
221
click to vote
ICFEM
2010
Springer
15 years 5 months ago
2010
Springer
Abstract. Today’s software systems are becoming increasingly configurable and designed for deployment on a plethora of architectures, ranging from sequential machines via multic...