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» The High Level Architecture for Simulations
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WMPI
2004
ACM
16 years 1 days ago
Evaluating kilo-instruction multiprocessors
The ever increasing gap in processor and memory speeds has a very negative impact on performance. One possible solution to overcome this problem is the Kilo-instruction processor. ...
Marco Galluzzi, Ramón Beivide, Valentin Pue...
HCW
1999
IEEE
15 years 11 months ago
An On-Line Performance Visualization Technology
We present a new software technology for on-line performance analysis and visualization of complex parallel and distributed systems. Often heterogeneous, these systems need capabi...
Aleksandar M. Bakic, Matt W. Mutka, Diane T. Rover
ISPD
2012
ACM
252views Hardware» more  ISPD 2012»
14 years 2 months ago
Towards layout-friendly high-level synthesis
There are two prominent problems with technology scaling: increasing design complexity and more challenges with interconnect design, including routability. High-level synthesis ha...
Jason Cong, Bin Liu 0006, Guojie Luo, Raghu Prabha...
DAC
2003
ACM
15 years 12 months ago
Advanced techniques for RTL debugging
Conventional register transfer level (RTL) debugging is based on overlaying simulation results on structural connectivity information of the Hardware Description Language (HDL) so...
Yu-Chin Hsu, Bassam Tabbara, Yirng-An Chen, Fur-Sh...
DAC
1997
ACM
15 years 10 months ago
Structured Design of Microelectromechanical Systems
In order to efficiently design complex microelectromechanical systems (MEMS) having large numbers of multi-domain components, a hierarchically structured design approach that is ...
Tamal Mukherjee, Gary K. Fedder