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» The High Level Architecture for Simulations
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DATE
2008
IEEE
75views Hardware» more  DATE 2008»
16 years 1 months ago
A low-cost concurrent error detection technique for processor control logic
This paper presents a concurrent error detection technique targeted towards control logic in a processor with emphasis on low area overhead. Rather than detect all modeled transie...
Ramtilak Vemu, Abhijit Jas, Jacob A. Abraham, Srin...
DAC
2005
ACM
16 years 7 months ago
Structure preserving reduction of frequency-dependent interconnect
A rational Arnoldi method for passivity-preserving model-order reduction (MOR) with implicit multi-point moment matching for systems with frequency-dependent interconnects is desc...
Quming Zhou, Kartik Mohanram, Athanasios C. Antoul...
MICAI
2005
Springer
16 years 3 days ago
Maximizing Future Options: An On-Line Real-Time Planning Method
Abstract. In highly dynamic environments with uncertainty the elaboration of long or rigid plans is useless because the constructed plans are frequently dismissed by the arrival or...
Ramón F. Brena, Emmanuel Martinez
MOBICOM
2004
ACM
16 years 1 days ago
Vehicle-to-vehicle safety messaging in DSRC
— This paper studies the design of layer-2 protocols for a vehicle to send safety messages to other vehicles. The target is to send vehicle safety messages with high reliability ...
Qing Xu 0007, Tony K. Mak, Jeff Ko, Raja Sengupta
INFOCOM
2009
IEEE
16 years 1 months ago
The Crosspoint-Queued Switch
Abstract—This paper calls for rethinking packet-switch architectures by cutting all dependencies between the switch fabric and the linecards. Most single-stage packet-switch arch...
Josef Kanizo, David Hay, Isaac Keslassy