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» The High Level Architecture for Simulations
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ACSAC
2007
IEEE
16 years 28 days ago
Extending the Java Virtual Machine to Enforce Fine-Grained Security Policies in Mobile Devices
The growth of the applications and services market for mobile devices is currently slowed down by the lack of a flexible and reliable security infrastructure. The development and...
Iulia Ion, Boris Dragovic, Bruno Crispo
ISPA
2007
Springer
16 years 22 days ago
Parallelization Strategies for the Points of Interests Algorithm on the Cell Processor
The Cell processor is a typical example of a heterogeneous multiprocessor-on-chip architecture that uses several levels of parallelism to deliver high performance. Closing the gap ...
Tarik Saidani, Lionel Lacassagne, Samir Bouaziz, T...
DATE
2006
IEEE
120views Hardware» more  DATE 2006»
16 years 19 days ago
System-level scheduling on instruction cell based reconfigurable systems
This paper presents a new operation chaining reconfigurable scheduling algorithm (CRS) based on list scheduling that maximizes instruction level parallelism available in distribut...
Ying Yi, Ioannis Nousias, Mark Milward, Sami Khawa...
INTERSENSE
2006
ACM
16 years 16 days ago
Issues in designing a compilation framework for macroprogrammed networked sensor systems
— There is growing interest in the networked sensing community in the technique of macroprogramming, where the end-user can design a system using a high level description without...
Animesh Pathak, Viktor K. Prasanna
DATE
2003
IEEE
90views Hardware» more  DATE 2003»
15 years 12 months ago
Mapping Applications to an FPFA Tile
Abstract— This paper introduces a transformational design method which can be used to map code written in a high level source language, like C, to a coarse grain reconfigurable ...
Michèl A. J. Rosien, Yuanqing Guo, Gerard J...